This invention relates to a method of manufacturing a capacitor, and more particularly to a method of forming an MOS capacitor in a groove cut in a semiconductor substrate.
In recent years, miniaturization and high integration based on the scaling method are being developed for an MOS dynamic memory (hereinafter abbreviated as "dRAM"). An MOS capacitor, a constituent of dRAM, follows the same pattern of development. Therefore, research is being made for the reduction of thickness t.sub.ox and area S of a gate oxide layer involved in said MOS capacitor. Now let it be assumed that .alpha. represents a scaling coefficient. Then, the thickness of the gate oxide layer is indicated as t.sub.ox /.alpha. and the area thereof as S/.alpha..sup.2. Assuming that the dielectric constant is denoted by .epsilon., then capacity C of the MOS capacitor is given as C=.epsilon.S/t.sub.ox. After said scaling, therefore, capacity C' of said MOS capacitor is reduced to 1/.alpha. as can be inferred from formula C'=C/.alpha..
When the MOS capacitor is reduced in capacity, the drawback arises that the scattering of alpha rays gives rise to the tendency toward the more frequent appearance of soft errors. Further, the smaller the capacity of the MOS capacitor, the more reduced a ratio between said capacity and that of bit rays, leading to a decline in a sense margin and consequently the more prominent tendency toward the appearance of malfunctions. Generally, therefore, the area of the MOS capacitor is reduced to an extent of S/.alpha. instead of S/.alpha..sup.2. Since, however, the dimension of the MOS capacitor area is reduced year after year, the manufacture of a highly reliable dRAM is approaching a limit.
To date, the application of an insulation layer of, for example, Ta.sub.2 O.sub.5 having a large dielectric constant has been proposed as means for increasing the capacity of the MOS capacitor, and yet this process is not put to practical application. On the other hand, research is being continued for the process of preparing a capacitor insulation layer from a highly reliable silicon oxide layer having an extremely small thickness of less than 10 [nm]. But this process is found incapable of practical use, because it is necessary to provide demineralized water of extremely high purity and chemicals and moreover build a clean room possessed of tremendously high purity.
Therefore, the recent method of increasing the capacity of the MOS capacitor consists in cutting a groove in the surface of a silicon substrate, to a sufficient depth to substantially increase the total capacity area without expanding the opening of said groove. When, however, such groove is formed by an anisotropic dry etching such as reactive ion etching (RIE), the undermentioned difficulties arise. Namely, the groove formed by this etching has its side walls rendered perpendicular, thereby causing the corners (angular portions) of the top or bottom portions of the groove to have an extremely small curvature radius. When, therefore, a gate oxide layer is deposited on the surface of a silicon substrate by thermal oxidation, the oxide layer deposited in the above-mentioned angular portions of the groove will have a thinner wall than the oxide layer formed on the flat portion of the groove. This phenomenon is explained as follows. When a silicon layer is oxidized, the volume of the resultant silicon layer will have a volume about 2.3 times the original silicon layer. When, therefore, oxidation proceeds, that side of an interface between Si and SiO.sub.2 which faces the oxidized layer undergoes compression stresses, which are concentrated in the aforementioned angular portions of the groove, thereby presumably suppressing oxidation.
When an oxidized layer deposited on the top or bottom angular portion is made thinner than the oxidized layer formed in the flat portion of the groove, its withstand voltage will decrease, causing a large leak current flow through an electric field even if it happens to have a low voltage level. Moreover, an electric field tends to be concentrated in the vertically extending angular section of the aforementioned groove. In the concentrated electric filed, therefore, Fowler-Nordhein current prominently increases to deteriorate the insulating property of the oxide layer. Conversely, if a capacitor insulation layer is made thick in order to sufficiently reduce a leak current with respect to the voltage actually applied, it will inevitably grow too thick in the flat portion of the groove. This event will inevitably offset the expected capacity increase which might otherwise to realized by the boring of a groove for the intended enlargement of the capacitor area.